Vector processing has existed since the 60s and lives on in modern CPUs as SIMD instructions. They are the main driver of performance for computationally intensive workloads such as multimedia and simulation. Vector registers have grown from MMX's 64 bit to 512 bit wide vectors today. ARM's Scalable Vector Extensions (SVE) take this growth to its logical conclusion and make the size of the registers an implementation detail while allowing binaries to run on any SVE capable processor.

We need to consider the impact of vectors on the TCG. Currently time is spent marshalling vector data to normal registers before calling helper functions. We will discuss the path to supporting vectors as first-class TCG citizens and also cover the other challenges in correctly modelling behaviour and ask if we can move beyond helper functions and generate efficient JIT code in a generic way.